Asic Design and Verification Intern salary at Synopsys ranges between ₹4.8
Lakhs
to ₹6
Lakhs
per year for employees with less than 1 year of experience. Salary
estimates are based on
3 latest salaries received
from various employees of Synopsys.
Experience wise Synopsys Asic Design and Verification Intern salaries
Last Updated: 11 Jan 2025
Experience | Avg Annual Salary |
---|---|
Fresher (AmbitionBox Estimate) |
₹4.4
L/yr
- ₹5.6
L/yr
|
Login to view exact salary
| |
1 year (AmbitionBox Estimate) |
₹5.4
L/yr
- ₹6.9
L/yr
|
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2w
fisherwoman

·
ex -
Onething

Salary negotiation
Hi All,
During a job opportunity, when the recruiter asked for my expected CTC, I mentioned 12 LPA, as my previous job's fixed salary was 7.8 LPA. Now, I’ve been shortlisted for the Product Designer role and have learned from some sources that their maximum budget is 14 LPA.
How should I approach the negotiation? Would it be reasonable to ask for 14 LPA, considering I initially stated my expectation as 12 LPA? The job is based in Gurgaon, and I have 4.5 years of experience.
Looking forward to your advice!
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Synopsys Asic Design and Verification Intern Salary FAQs
What is the notice period for Asic Design and Verification Intern at Synopsys?
According to AmbitionBox, 67% of the Synopsys Asic Design and Verification Interns reported a notice period of 15 days or less, 33% reported a notice period of 1 Month.This is based on 3 responses on AmbitionBox in last 2 years.
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Synopsys Asic Design and Verification Intern salary
in
India
ranges between ₹4.8
Lakhs to ₹6
Lakhs with an average annual salary of
₹. Salary estimates are based on
3
Synopsys latest salaries received from various employees of
Synopsys.