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16 7hillsTS Jobs

Physical Design Engineer (7-25 yrs)

7-25 years

Physical Design Engineer (7-25 yrs)

7hillsTS

posted 3 weeks ago

Job Description

Job Overview :


We are seeking a highly skilled Physical Design Engineer with in-depth knowledge and hands-on experience in the Netlist-to-GDSII implementation process. The ideal candidate will be proficient in various stages of physical design, including floor planning, placement, clock tree synthesis (CTS), routing, static timing analysis (STA), power integrity analysis, and physical verification. Experience with submicron technology nodes (28nm and below) and proficiency in programming languages such as Tcl/Tk/Perl are essential.


Key Responsibilities :


Netlist-to-GDSII Implementation :


- Lead and execute the physical design flow from synthesized netlist to GDSII layout.


- Perform floor planning, placement, CTS, routing, and STA to meet design specifications.


Physical Design Methodologies :


- Apply industry-standard physical design methodologies for submicron technology nodes (28nm and below).


- Ensure design meets performance, power, and area (PPA) targets while adhering to foundry design rules.


Programming and Automation :


- Develop and maintain Tcl/Tk/Perl scripts to automate design tasks and enhance tool efficiency.


- Customize and extend EDA tool functionalities to meet specific project requirements.


Tool Expertise :


- Utilize Synopsys and Cadence tools effectively, including :


1. Synopsys : ICC2, PrimeTime, PT-PX


2. Cadence : Innovus, Calibre


- Leverage these tools for tasks such as placement optimization, timing analysis, and physical verification.


Timing Analysis and Closure :


- Perform detailed STA to identify and resolve timing violations.


- Implement timing closure strategies to ensure the design meets all timing constraints.


Power Integrity Analysis :


- Analyze and optimize power distribution networks (PDNs) to minimize IR drop and ensure reliable power delivery.


- Address power-related issues through appropriate design modifications.


Physical Verification :


- Conduct DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical Rule Check) to ensure design compliance.


- Collaborate with the verification team to resolve any identified issues.


Leadership and Collaboration :


- Provide technical leadership and mentorship to junior engineers.


- Collaborate with cross-functional teams, including front-end designers and verification engineers, to achieve design goals.


- Communicate effectively with global teams to ensure project alignment and timely delivery.


Functional Areas: R&D

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7hillsTS Benefits

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Cafeteria
Work From Home
Health Insurance
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Work From Home
Free Transport
Child care
Gymnasium
Cafeteria
Free Food +6 more
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7hillsTS Bangalore / Bengaluru Office Location

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Bengaluru/Bangalore Office
Headquarter
No.706, 1st Floor, Balaji Complex, Mico Main Road, 10th Cross Chennakeshava Naga Bengaluru/Bangalore
560100

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