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I applied via Referral
I applied via Campus Placement and was interviewed in Dec 2016. There were 4 interview rounds.
A 2 to 1 mux can be designed using logic gates or multiplexer ICs.
A 2 to 1 mux has 2 inputs and 1 output.
It selects one of the inputs based on the value of the select input.
The truth table for a 2 to 1 mux can be used to design the circuit.
Multiplexer ICs like 74HC153 can be used to implement the design.
The output of the mux can be connected to a logic gate or another mux for further processing.
I appeared for an interview before Jun 2016.
Designing a memory organization based on size and block units.
Determine the size of the memory and the size of each block unit
Choose a suitable memory organization scheme such as direct mapping, associative mapping, or set-associative mapping
Implement the chosen scheme and test for efficiency and accuracy
A random number generator circuit diagram can be created using a noise source and an amplifier.
Use a noise source such as a Zener diode or a reverse-biased transistor
Amplify the noise signal using an amplifier circuit
Use a comparator to convert the analog signal to a digital signal
Add a clock circuit to control the output frequency
A Schmitt trigger/inverter is a circuit that converts a noisy input signal into a clean digital output signal.
It has two threshold voltage levels: a high threshold and a low threshold
The output of the circuit changes state only when the input voltage crosses one of the threshold levels
It is commonly used in digital circuits to clean up noisy signals and to provide hysteresis
Examples include debouncing switches, signal ...
To optimize power usage/delay in AND gates, arrange inputs based on their capacitance and resistance.
Arrange inputs with lower capacitance and resistance closer to the gate
Inputs with higher capacitance and resistance should be placed farther away
Consider the layout of the circuit and the routing of the wires
Simulation tools can be used to determine optimal input arrangement
Answering a question on drawing CMOS circuit and W/L sizing for a given logic equation.
Understand the logic equation and its truth table
Use CMOS inverter and NAND gates to implement the logic
Size the transistors based on their role in the circuit
Check the circuit for correct functionality
Examples: AND gate, OR gate, XOR gate
A circuit for a set of logic equations using PLA
PLA stands for Programmable Logic Array
PLA is a type of digital circuit used to implement combinational logic circuits
The circuit consists of an AND array and an OR array
Inputs are fed into the AND array and the outputs are fed into the OR array
Example: A PLA circuit for a 2-input XOR gate would have 2 inputs, 2 AND gates, and 1 OR gate
Draw output waveforms for a logic circuit given delays for gates and wires.
Identify the logic gates and their delays
Determine the propagation delay for each wire
Use the delays to calculate the output waveform
Draw the waveform using a timing diagram
Design a circuit to get an output of frequency f/3 from a clock waveform of frequency f.
Use a counter to divide the frequency by 3
Implement a flip-flop to toggle the output
Use logic gates to control the counter and flip-flop
My M.Tech. project was focused on developing a machine learning algorithm for predicting stock prices.
Used historical stock data to train the algorithm
Implemented various machine learning techniques such as regression and neural networks
Achieved an accuracy of 80% in predicting stock prices
Explored the impact of news articles on stock prices
Qualcomm is a multinational semiconductor and telecommunications equipment company.
Founded in 1985 in San Diego, California
Specializes in designing and manufacturing wireless telecommunications products and services
Known for their Snapdragon processors used in smartphones and other mobile devices
Also involved in developing 5G technology and Internet of Things (IoT) devices
Has partnerships with various companies includi...
Yes, I have worked in groups on various projects.
I have worked in groups during my college projects.
I have also worked in groups in my previous job on a software development project.
In both cases, we had to collaborate and divide tasks among team members.
We had regular meetings to discuss progress and address any issues.
I found that working in a group allowed us to leverage each other's strengths and produce better res...
Discussing project management, challenges faced, and solutions implemented in engineering projects.
Define project scope and objectives clearly to avoid scope creep.
Utilize project management tools like Gantt charts for scheduling.
Example: In a bridge construction project, we faced delays due to weather; we adjusted timelines and communicated with stakeholders.
Regular team meetings to assess progress and address issues ...
Clock gating is a power-saving technique used in digital design to disable the clock signal to certain parts of a circuit when they are not in use.
Clock gating helps reduce power consumption by stopping the clock signal to unused parts of the circuit.
It is achieved by inserting logic gates in the clock signal path to control when the clock is allowed to reach certain elements.
Clock gating can be implemented at differen...
I appeared for an interview before Dec 2023.
Use len() function to count number of elements in an array in Python.
Use len() function with the array as argument to get the count of elements.
Example: array = ['apple', 'banana', 'cherry'] Count = len(array) # Output: 3
Merge two sorted arrays nums1 and nums2 into nums1 in-place.
Initialize pointers for nums1 and nums2 at the end of their elements
Compare elements pointed by the two pointers and place larger element at end of nums1
Repeat until all elements from nums2 have been merged into nums1
Psuedo code of binary search. and some OOPs concept.
I applied via Campus Placement
Aptitude, Programming, Communication
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