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I applied via LinkedIn and was interviewed in Nov 2024. There was 1 interview round.
Resolving clock violations involves optimizing timing paths, adjusting clock tree design, and ensuring proper signal integrity.
Identify the source of the clock violation using timing analysis tools like PrimeTime.
Optimize the clock tree by reducing skew and improving latency; for example, using buffer insertion.
Adjust the placement of critical components to minimize the distance between clock sources and sinks.
Use cloc...
I applied via LinkedIn and was interviewed before Dec 2023. There was 1 interview round.
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I am interested in Freescale because of their innovative technology and strong reputation in the industry.
Freescale has a history of developing cutting-edge technology
Their reputation in the industry is strong and respected
I am excited about the opportunity to work with a company that values innovation and excellence
posted on 28 Aug 2016
I applied via Campus Placement
I applied via Campus Placement and was interviewed before Jan 2021. There were 3 interview rounds.
A cache is a high-speed data storage layer that stores frequently accessed data to reduce access time. A tag is used to identify the location of data in the cache.
Cache is a temporary storage that holds frequently accessed data
It reduces the access time by providing faster access to data
Tag is used to identify the location of data in the cache
Tag is a part of the cache memory address
Cache can be implemented in hardware...
C Coding questions
I come from a close-knit family that values education and creativity, which has greatly influenced my career in design engineering.
My parents are both engineers, which inspired my interest in design from a young age.
I have a younger sister who is studying architecture, showcasing our family's commitment to creative fields.
Family gatherings often involve discussions about projects and innovations, fostering a collaborat...
I excel in problem-solving and teamwork, but I sometimes struggle with time management under tight deadlines.
Strength: Strong analytical skills - I successfully designed a component that improved efficiency by 20%.
Strength: Excellent communication - I effectively collaborated with cross-functional teams to meet project goals.
Weakness: Time management - I occasionally underestimate the time needed for complex tasks, but...
I applied via Recruitment Consulltant and was interviewed before Aug 2021. There was 1 interview round.
Stackup is decided based on the number of layers, signal integrity requirements, and manufacturing constraints.
Consider the number of layers required for the design
Evaluate signal integrity requirements and impedance control
Take into account manufacturing constraints such as minimum trace width and spacing
Balance cost and performance
Use simulation tools to optimize the stackup
Consult with PCB fabricators for their reco...
based on 2 interview experiences
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