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The maximum sum from root to leaf in a binary tree, where only parent or child can be included in the sum.
Use a recursive approach to traverse the binary tree.
At each node, calculate the maximum sum from its left and right child.
Compare the sums and return the maximum sum plus the value of the current node.
Repeat this process until reaching a leaf node.
Track the maximum sum encountered during the traversal.
UDP is preferred over TCP in this project due to its low latency and lightweight nature.
UDP is a connectionless protocol, which means it does not establish a direct connection between the sender and receiver.
UDP is faster than TCP as it does not have the overhead of establishing and maintaining a connection.
UDP is suitable for applications where real-time data transmission is crucial, such as video streaming or on...
To clear the 7th bit in a 32-bit register, perform a bitwise AND operation with a mask that has all bits set to 1 except the 7th bit.
Create a mask with the 7th bit set to 0 and all other bits set to 1
Perform a bitwise AND operation between the register and the mask
Store the result back in the register
An inverter has 5 levels of working: input, pre-driver, driver, output, and load.
Input stage receives the input signal and converts it to a digital signal.
Pre-driver stage amplifies the digital signal and sends it to the driver stage.
Driver stage amplifies the signal further and sends it to the output stage.
Output stage converts the amplified signal back to analog form.
Load stage receives the analog signal and dri...
Strong 1 and strong 0 are the maximum voltage levels that an inverter can output for logic 1 and logic 0 respectively.
Strong 1 is the maximum voltage level that an inverter can output for logic 1.
Strong 0 is the maximum voltage level that an inverter can output for logic 0.
These concepts are important in determining the noise margin of a digital circuit.
The noise margin is the difference between the minimum voltag...
Stabilization concept in an amplifier refers to the techniques used to prevent oscillations and ensure stable operation.
Stabilization is achieved by adding feedback components to the amplifier circuit
The feedback components can include resistors, capacitors, and inductors
Negative feedback is commonly used to stabilize amplifiers
Positive feedback can cause instability and oscillations
Stabilization techniques vary d...
A CMOS inverter is a digital logic gate that converts a digital input signal to its complement.
It consists of a PMOS transistor and an NMOS transistor connected in series.
The input signal is connected to the gates of both transistors.
The output is taken from the drain of the PMOS transistor and the drain of the NMOS transistor.
When the input is high, the PMOS transistor is off and the NMOS transistor is on, result...
Voltage divider bias circuit is preferred due to its stability and low sensitivity to temperature variations.
Provides stable bias voltage
Low sensitivity to temperature variations
Simple and easy to implement
Suitable for low power applications
Reduces noise and distortion
Examples: BJT amplifier circuits, op-amp circuits
An NMOS cross-sectional view and electron flow level working explanation.
NMOS stands for n-channel metal-oxide-semiconductor.
It is a type of MOSFET (metal-oxide-semiconductor field-effect transistor).
NMOS has a source, drain, and gate terminal.
When a voltage is applied to the gate, it creates an electric field that attracts electrons from the source to the drain.
The flow of electrons from source to drain is contro...
Small signal analysis is linear and deals with small variations around an operating point, while large signal analysis is nonlinear and deals with large variations.
Small signal analysis assumes that the circuit is linear and that the input signal is small enough to not affect the operating point of the circuit.
Large signal analysis deals with nonlinear circuits and assumes that the input signal is large enough to ...
I appeared for an interview in Mar 2025, where I was asked the following questions.
OOP in C++ is based on concepts like encapsulation, inheritance, polymorphism, and abstraction for better code organization.
Encapsulation: Bundling data and methods in classes. Example: class Car { private: int speed; public: void setSpeed(int s) { speed = s; }};
Inheritance: Deriving new classes from existing ones. Example: class ElectricCar : public Car {}; // ElectricCar inherits from Car
Polymorphism: Ability to call...
Analyze pseudocode for errors and potential outputs.
Check for syntax errors, such as missing semicolons or parentheses.
Verify variable initialization before use to avoid null references.
Ensure loops have proper termination conditions to prevent infinite loops.
Examine array indexing to avoid out-of-bounds errors.
Consider data types and conversions, especially in arithmetic operations.
I applied via Campus Placement and was interviewed in Apr 2024. There were 2 interview rounds.
A stick diagram is a simplified way to represent the layout of a CMOS inverter circuit.
Use sticks to represent the diffusion regions of the transistors in the CMOS inverter
Draw a stick for the PMOS transistor connected to VDD and a stick for the NMOS transistor connected to GND
Connect the sticks with lines to represent the metal interconnects between the transistors
Label the input and output nodes of the inverter for c...
If the circuit of an inverter is inverted, it will act as a buffer.
Inverting an inverter circuit essentially cancels out the inversion, making it act as a buffer.
The output will be the same as the input signal, with no inversion.
This can be useful in certain signal processing applications where a non-inverted signal is needed.
Clock gating is a power-saving technique used in digital design to disable the clock signal to certain parts of a circuit when they are not in use.
Clock gating helps reduce power consumption by stopping the clock signal to unused parts of the circuit.
It is achieved by inserting logic gates in the clock signal path to control when the clock is allowed to reach certain elements.
Clock gating can be implemented at differen...
I applied via Campus Placement and was interviewed in Feb 2024. There were 2 interview rounds.
Reverse a linked list
Iterate through the linked list and reverse the pointers
Use three pointers to keep track of current, previous, and next nodes
Update the next pointer of each node to point to the previous node
I applied via Campus Placement and was interviewed in Mar 2024. There was 1 interview round.
One round online life coding, with the question being a simple find the smallest element from a list
I applied via Referral and was interviewed in Feb 2024. There was 1 interview round.
I applied via LinkedIn and was interviewed in May 2024. There were 2 interview rounds.
IQ Test to ask about my personality and a score generated.
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